Добавил:
Опубликованный материал нарушает ваши авторские права? Сообщите нам.
Вуз: Предмет: Файл:
8XC196Kx,8XC196Jx,87C196CA microcontroller family user's manual.1995.pdf
Скачиваний:
57
Добавлен:
23.08.2013
Размер:
3.97 Mб
Скачать

PROGRAMMING CONSIDERATIONS

ADDB

AL,BL,[CX]

;

AL BL + MEM_BYTE(CX)

POP

[AX]

;

MEM_WORD(AX) MEM_WORD(SP)

;SP SP + 2

3.2.3.1Indirect Addressing with Autoincrement

You can choose to automatically increment the indirect address after the current access. You specify autoincrementing by adding a plus sign (+) to the end of the indirect reference. In this case, the instruction automatically increments the indirect address (by one if the destination is an 8-bit register or by two if it is a 16-bit register). When your code is assembled, the assembler automatically sets the least-significant bit of the indirect address register. The following instructions use indirect addressing with autoincrement:

LD

AX,[BX]+

; AX

MEM_WORD(BX)

 

 

; BX

BX + 2

ADDB

AL,BL,[CX]+

; AL

BL + MEM_BYTE(CX)

 

 

;

CX

CX

+

1

PUSH

[AX]+

;

SP

SP

-

2

;MEM_WORD(SP) MEM_WORD(AX)

;AX AX + 2

3.2.3.2Indirect Addressing with the Stack Pointer

You can also use indirect addressing to access the top of the stack by using the stack pointer as the WORD register in an indirect reference. The following instruction uses indirect addressing with the stack pointer:

PUSH [SP]

; duplicate top of stack

;SP SP +2

3.2.4Indexed Addressing

Indexed addressing calculates an address by adding an offset to a base address. There are three variations of indexed addressing: short-indexed, long-indexed, and zero-indexed. Both shortand long-indexed addressing are used to access a specific element within a structure. Short-indexed addressing can access up to 255 byte locations, long-indexed addressing can access up to 65,535 byte locations, and zero-indexed addressing can access a single location. An instruction can contain only one indexed reference; any remaining operands must be register-direct references.

3.2.4.1Short-indexed Addressing

In a short-indexed instruction, you specify the offset as an 8-bit constant and the base address as an indirect address register (a WORD). The following instructions use short-indexed addressing.

LD

AX,12[BX]

;

AX

MEM_WORD(BX+12)

MULB

AX,BL,3[CX]

;

AX

BL × MEM_BYTE(CX+3)

3-7

8XC196Kx, Jx, CA USER’S MANUAL

The instruction LD AX,12[BX] loads AX with the contents of the memory location that resides at address BX+12. That is, the instruction adds the constant 12 (the offset) to the contents of BX (the base address), then loads AX with the contents of the resulting address. For example, if BX contains 1000H, then AX is loaded with the contents of location 1012H. Short-indexed addressing is typically used to access elements in a structure, where BX contains the base address of the structure and the constant (12 in this example) is the offset of a specific element in a structure.

You can also use the stack pointer in a short-indexed instruction to access a particular location within the stack, as shown in the following instruction.

LD AX,2[SP]

3.2.4.2Long-indexed Addressing

In a long-indexed instruction, you specify the base address as a 16-bit variable and the offset as an indirect address register (a WORD). The following instructions use long-indexed addressing.

LD

AX,TABLE[BX]

; AX MEM_WORD(TABLE+BX)

AND

AX,BX,TABLE[CX]

;

AX BX

AND MEM_WORD(TABLE+CX)

ST

AX,TABLE[BX]

;

MEM_WORD(TABLE+BX) AX

ADDB

AL,BL,LOOKUP[CX]

; AL BL

+ MEM_BYTE(LOOKUP+CX)

The instruction LD AX, TABLE[BX] loads AX with the contents of the memory location that resides at address TABLE+BX. That is, the instruction adds the contents of BX (the offset) to the constant TABLE (the base address), then loads AX with the contents of the resulting address. For example, if TABLE equals 4000H and BX contains 12H, then AX is loaded with the contents of location 4012H. Long-indexed addressing is typically used to access elements in a table, where TABLE is a constant that is the base address of the structure and BX is the scaled offset (n × element size, in bytes) into the structure.

3.2.4.3Zero-indexed Addressing

In a zero-indexed instruction, you specify the address as a 16-bit variable; the offset is zero, and you can express it in one of three ways: [0], [ZERO_REG], or nothing. Each of the following load instructions loads AX with the contents of the variable THISVAR.

LD

AX,THISVAR[0]

LD

AX,THISVAR[ZERO_REG]

LD

AX,THISVAR

The following instructions also use zero-indexed addressing:

ADD

AX,1234[ZERO_REG]

; AX AX + MEM_WORD(1234)

POP

5678[ZERO_REG]

;

MEM_WORD(5678) MEM_WORD(SP)

 

 

;

SP SP + 2

3-8

Соседние файлы в предмете Электротехника