8XC196EA USER’S MANUAL
7.3.5External Interrupt Signal (Port 2)
Port 2, pin 2 can function as the external interrupt (EXTINT) signal or as a general-purpose I/O signal (). To configure port 2, pin 2 as the external interrupt, set P2_DIR.2, P2_MODE.2, and P2_REG.2. Setting the P2_MODE.2 bit could cause the device to set the corresponding interrupt pending bit, indicating an interrupt request; therefore, follow this sequence to prevent a false interrupt request:
1.Disable interrupts by executing the DI instruction.
2.Set P2_DIR.2.
3.Set P2_MODE.2.
4.Set P2_REG.2.
5.Clear the external interrupt pending bit (INT_PEND1.6).
6.Enable interrupts (optional) by executing the EI instruction.
Table 7-11. External Interrupt Signal
External Interrupt |
I/O Signal |
External Interrupt Signal Description and Considerations |
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Signal |
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EXTINT |
P2.2 |
Description: |
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External Interrupt. In normal operating mode, a rising edge on |
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EXTINT sets the EXTINT interrupt pending bit. EXTINT is |
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sampled during phase 2 (CLKOUT high). The minimum high time |
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is one state time. |
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In powerdown mode, asserting the EXTINT signal for at least 50 |
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ns causes the device to resume normal operation. The interrupt |
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does not need to be enabled, but the pin must be configured as a |
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special-function input. If the EXTINT interrupt is enabled, the |
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CPU executes the interrupt service routine. Otherwise, the CPU |
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executes the instruction that immediately follows the command |
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that invoked the power-saving mode. |
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In idle mode, asserting any enabled interrupt causes the device |
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to resume normal operation. |
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Considerations: |
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Setting P2_MODE.2 could cause the microcontroller to set the |
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external interrupt pending bit; therefore, to prevent a false |
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interrupt request, clear the interrupt pending bit before globally |
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enabling interrupts. |
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I/O PORTS
7.3.6PWM Signals (Port 11)
The port 11 pins can function as PWM signals or general-purpose I/O signals (Table 7-12). To use a port 11 pin as a PWM signal, set the corresponding P11_MODE bit, selecting special-func- tion mode, and clear the corresponding P11_DIR bit, configuring the pin as a complementary output.
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Table 7-12. PWM Signals |
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PWM Signal |
I/O Signal |
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PWM Signal Description and Considerations |
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PWM7:0 |
P11.7:0 |
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Description: |
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Pulse Width Modulator Outputs. These are PWM output pins with |
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high-current drive capability. |
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Considerations: |
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Following reset, pins P11.7:0 are weakly pulled high until your |
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software writes configuration data into P11_MODE. |
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7.3.7Serial I/O Port Signals (Ports 2 and 7)
Some port 2 and 7 pins can function as SIO signals or general-purpose I/O signals (). To use a port 2 or 7 pin as an SIO signal, set the corresponding Px_MODE bit, selecting special-function mode. To configure an SIO signal as a complementary output, clear the corresponding Px_DIR bit. To configure an SIO signal as an input, set the corresponding Px_DIR and Px_REG bits. To configure an SIO signal as an open-drain output, set the corresponding Px_DIR bit.
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8XC196EA USER’S MANUAL
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Table 7-13. SIO Signals |
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SIO Signal |
I/O Signal |
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SIO Signal Description and Considerations |
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RXD0 |
P2.1 |
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Description: |
RXD1 |
P2.4 |
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Receive Serial Data 0 and 1. In modes 1, 2, and 3, RXD0 and 1 |
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receive serial port input data. In mode 0, they function as either |
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inputs or open-drain outputs for data. |
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Considerations: |
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Following reset, pins P2.1 and P2.4 are weakly pulled high until |
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your software writes configuration data into P2_MODE. |
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T2CLK |
P7.2 |
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Description: |
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Timer 2 External Clock. External clock for the serial I/O baud-rate |
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generator input (program selectable). |
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Considerations: |
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Following reset, pin P7.2 is weakly pulled high until your software |
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writes configuration data into P7_MODE. |
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TXD0 |
P2.0 |
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Description: |
TXD1 |
P2.3 |
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Transmit Serial Data 0 and 1. In serial I/O modes 1, 2, and 3, |
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TXD0 and 1 transmit serial port output data. In mode 0, they are |
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the serial clock output. |
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Considerations: |
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Following reset, pins P2.0 and P2.3 are weakly pulled high until |
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your software writes configuration data into P2_MODE. |
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7.3.8Special Operating Mode Signal (Port 5 Pin 7)
Port 5, pin 7 can function as either the return-from-powerdown signal or as a general-purpose I/O signal (). To use port 5, pin 7 as the return-from-powerdown signal, set P5_MODE.7. When port 5, pin 7 is configured as its special-function signal RPD, the microcontroller automatically configures the pin as an input signal. (It is not necessary to program P5_DIR and P5_REG.)
Table 7-14. Special Operating Mode Signal
Special Operating |
I/O Signal |
Description |
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Mode Signal |
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RPD |
P5.7 |
Return from Powerdown. Timing pin for the return-from- |
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powerdown circuit. |
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I/O PORTS
7.3.9Synchronous Serial I/O Port Signals (Port 10)
Some port 10 pins can function as SSIO signals or general-purpose I/O signals (Table 7-15). To use a port 10 pin as an SSIO signal, set the corresponding P10_MODE bit, selecting special-func- tion mode. To configure an SSIO signal as a complementary output, clear the corresponding P10_DIR bit. To configure an SSIO signal as an input, set the corresponding P10_DIR and P10_REG bits. To configure an SSIO signal as an open-drain output, set the corresponding P10_DIR bit.
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Table 7-15. SSIO Signals |
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SSIO Signal |
I/O Signal |
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SSIO Signal Description and Considerations |
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CHS# |
P9.2 |
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Description: |
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Channel Select. This signal is available only when the SSIO is |
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configured for channel-select operation. The function of the |
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signal depends on whether the SSIO is configured as master or |
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slave. When the SSIO is configured as a slave, an external |
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master activates CHS# to communicate with the SSIO. When the |
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SSIO is configured as a master, an external master activates |
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CHS# when it wants the SSIO to give up the bus. |
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SC0 |
P10.0 |
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Description: |
SC1 |
P10.2 |
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Clock Pins for SSIO0 and 1. These pins carry a signal only |
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during receptions and transmissions. When the SSIO port is idle, |
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the pin remains either high (with handshaking) or low (without |
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handshaking). |
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Considerations: |
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Following reset, pins P10.0 and P10.2 are weakly held high until |
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your software writes configuration data into P10_MODE. |
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For handshaking mode, configure SC1:0 as open-drain outputs. |
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SD0 |
P10.1 |
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Description: |
SD1 |
P10.3 |
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Data Pins for SSIO0 and 1. These pins are the data I/O pins for |
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SSIO0 and 1. |
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Considerations: |
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Following reset, pins P10.1 and P10.3 are weakly held high until |
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your software writes configuration data into P10_MODE. |
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