USING THE TEST-ROM ROUTINES

Table 17-3. ROM-dump Memory Map

17.5 SERIAL PORT MODE ROUTINE

The serial port mode test-ROM routine enables the serial I/O (SIO) port to write data through the TXD0 pin and read it through the RXD0 pin. In this mode, the device executes a routine from its internal test ROM. This routine is a modified version of the reduced instruction set monitor (RISM) that exists on all 8X9X evaluation boards. The simple hardware setup of this routine makes it useful for in-module testing and in-line diagnostics. Special software, called IBSP196, simplifies communication between the device and a smart terminal. This software is available free of charge through the Intel BBS. (See “Application Support Services” on page 1-8.)

NOTE

Serial port mode has no provision for security-key verification. If the LOC bit is cleared in CCB0, an attempt to enter serial port mode causes the device to enter an endless loop.

Entering serial port mode enables you to perform these functions:

•download a module-testing program into internal RAM and execute it

•examine the code programmed into the ROM

•examine the contents of any register

•manipulate RAM, SFRs, or pin states

17.5.1 Serial Port RISM

When you enter serial port mode test-ROM routine, the device begins executing its RISM (reduced instruction set monitor) program. The RISM executes in 16-Mbyte mode (24-bit addresses). You communicate with the device by sending RISM commands from any smart terminal across the TXD0 and RXD0 pins at a fixed baud rate. (For a complete list of all the available RISM commands, refer to “RISM Command Descriptions” on page 17-15.)

Upon entering serial port mode, the device enters a waiting loop, called Monitor_Pause, in which it waits for RISM commands to arrive across the serial port. The commands are each one byte in length and have values between 00H and 1FH. A value between 00H and 1FH is considered a command unless it follows a data latch enable (SET_DLE_FLAG) command. The SET_DLE_FLAG command sets the DLE flag in the MODE register (57H). The DLE flag alerts

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8XC196EA USER’S MANUAL

the RISM to store the next byte in the DATA register, a 32-bit first-in-last-out (FILO) register located at 58H.

When a receive interrupt occurs, the RISM checks the data value and the DLE flag. If the data value is greater than 1FH or if the DLE flag is set, the received byte is considered data and is stored in the DATA register (58H). Each time new data is received, the DATA register is shifted left by eight bits. If the value is between 00H and 1FH and the DLE flag is clear, the received byte is considered a command. Commands are stored in the CHAR register (56H). After it executes each command, the RISM resumes Monitor_Pause, except where otherwise noted.

To access a particular address, you must first send the address across the serial port as data. Send it one byte at a time, with the high byte first (the address is always assumed to be 24 bits). The RISM stores the address data in the DATA register. Now you must transfer the address from the DATA register to the shadow address register (5CH) by sending the DATA_TO_ADDR command (0AH).

17.5.2 Serial Port Mode Circuit

Figure 17-3 shows the recommended circuit for serial port mode. In this mode, data is transmitted and received through the TXD0 (P2.0) and RXD0 (P2.1) pins. Connect these pins to any smart terminal capable of communicating with the RISM. Any host that requires an RS-232C interface (such as a PC) must be connected through an RS-232C driver/receiver such as the one shown within the dashed line in Figure 17-3. XTAL1 and XTAL2 can be connected to a crystal with a frequency of 9600 baud at 16 MHz. The frequency must correspond to the value in the SP_BAUD register.

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USING THE TEST-ROM ROUTINES

Figure 17-3. Serial Port Mode Circuit

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