Programmer’s Model for Test

4.4Integration testing of block inputs

The following sections describe the integration testing for the block inputs:

•Intra-chip inputs on page 4-10

•Primary inputs on page 4-11.

4.4.1Intra-chip inputs

Figure 4-1 explains the implementation details of the input integration test harness. The ITEN bit is used as the control bit for the multiplexor, which is used in the read path of the SCITXDMACLR and SCIRXDMACLR intra-chip inputs. If the ITEN control bit is deasserted, the SCITXDMACLR and SCIRXDMACLR intra-chip inputs are routed as the internal SCITXDMACLR and SCIRXDMACLR inputs respectively, otherwise the stored register values are driven on the internal line. All other bits in the SCIITIP register are connected directly to the primary input pins.

Figure 4-1 Input integration test harness

When you run integration tests with the PrimeCell SCI in a standalone test setup:

•Write a 1 to the ITEN bit in the control register. This selects the test path from the SCIITIP[5:4] register bits to the SCIRXDMACLR and SCITXDMACLR signals.

•Write a 1 and then a 0 to each of the SCIITIP[5:4] register bits, and read the same register bits to ensure that the value written is read out.

Programmer’s Model for Test

When you run integration tests with the PrimeCell SCI as part of an integrated system:

•Write a 0 to the ITEN bit in the control register. This selects the normal path from the external SCIRXDMACLR pin to the internal SCIRXDMACLR signal, and the path from the external SCITXDMACLR pin to the internal

SCITXDMACLR pin.

•Write a 1 and then a 0 to the internal test registers of the DMA controller to toggle the SCIRXDMACLR signal connection between the DMA controller and the PrimeCell SCI. Read from the SCIITIP[4] register bit to verify that the value written into the DMA controller, is read out through the PrimeCell SCI. Similarly, write a 1 and then a 0 to the internal registers of the DMA controller to toggle the SCITXDMACLR signal connection between the DMA controller and the PrimeCell SCI. Read from the SCIITIP[5] register bit to verify that the value written into the DMA controller, is read out through the PrimeCell SCI.

4.4.2Primary inputs

The following primary inputs are tested using the integration vector trickbox:

•SCICLKIN

•SCIDATAIN

•SCIDEACREQ

•SCIDETECT.