Functional Overview

2.6PrimeCell SCI clock and data driver configurations

The PrimeCell SCI has been designed so that the clock and data pads can be configured to drive on-chip open drain pads or external off-chip buffers. Four configurations are available:

•On-chip open drain CLOCK configuration (nSCICLKOUTEN used to enable pulldown) on page 2-29

•Off-chip buffer driven CLOCK configuration (SCICLKOUT clock, nSCICLKEN tristate control) on page 2-30

•On-chip open drain DATA configuration (nSCIDATAOUTEN used to enable pulldown) on page 2-31

•Off-chip buffer driven DATA configuration (nSCIDATAOUTEN data, nSCIDATAEN tristate control) on page 2-32

•Instantiating two data out pads on page 2-33.

2.6.1On-chip open drain CLOCK configuration (nSCICLKOUTEN used to enable pulldown)

When configured as shown in Figure 2-10, CLKZ1 (bit 3) in the SCI control register SCICR1 must be programmed to a 1, which causes a 0 to be permanently driven onto the SCICLKOUT signal pad input. The SCICLKOUT pad can either drive a zero when the active LOW enable signal nSCICLKOUTEN is a 0 or be pulled HIGH when it is a 1. The required clock signal sequence is provided by the PrimeCell SCI state machine.

Vdd

SCICLKIN

nSCICLKOUTEN

Pad

SCICLKOUT (=0)

Figure 2-10 On-chip open drain CLOCK configuration

In the configuration shown in Figure 2-10:

•SCICLKOUT is forced LOW by the chip

•the open drain output is a full p/n channel driver, with the p channel permanently turned off in this configuration.

Functional Overview

2.6.2 Off-chip buffer driven CLOCK configuration (SCICLKOUT clock, nSCICLKEN tristate control)

When configured as shown in Figure 2-11, CLKZ1 (bit 3) in the SCI control register SCICR1 must be programmed to a 0, which causes a 0 to be permanently driven onto the active LOW nSCICLKOUTEN enable input. The SCICLKOUT pad is permanently enabled and feeds the input of an off-chip non-inverting buffer, controlled by the active low enable signal nSCICLKEN. The required clock signal sequence is provided by the PrimeCell SCI state machine.

Pads

SCICLKIN

nSCICLKEN

nSCICLKOUTEN

SCICLKOUT

Figure 2-11 Off-chip buffer driven CLOCK configuration

In the configuration shown in Figure 2-11:

•nSCICLKOUTEN is forced low by the chip, which permanently enables the

SCICLKOUT pad

•the off-chip buffer tristate control is provided by nSCICLKEN.

Functional Overview

2.6.3On-chip open drain DATA configuration (nSCIDATAOUTEN used to enable pulldown)

When configured as shown in Figure 2-12, nSCIDATAEN is not used and the SCI DATA pad can either drive a zero when the active low enable signal nSCIDATAOUTEN is a 0, or be pulled high when it is a 1. There is no requirement to program CLKZ1 (bit 3) in the SCICR1 register. The required data signal sequence is provided by the PrimeCell SCI state machine.

Vdd

SCIDATAIN

nSCIDATAOUTEN

(TxData)

Pad

0v

Figure 2-12 On-chip open drain DATA configuration

Functional Overview

2.6.4 Off-chip buffer driven DATA configuration (nSCIDATAOUTEN data, nSCIDATAEN tristate control)

When configured as shown in Figure 2-13, the external buffer data input is fed by nSCIDATAOUTEN and controlled by the active low nSCIDATAEN signal. There is no requirement to program CLKZ1 (bit 3) in the SCICR1 register. The required data signal sequence is provided by the PrimeCell SCI state machine.

Pads

SCIDATAIN

nSCIDATAEN

nSCIDATAOUTEN

(TxData)

Figure 2-13 Off-chip buffer driven DATA configuration