Programmer’s Model

3.3.34PrimeCell identification registers

The SCIPCellID0-3 registers are four 8-bit wide registers, that span address locations 0xFF0 to 0xFFC. The registers can conceptually be treated as a 32-bit register. The register is used as a standard cross-peripheral identification system. The SCIPCellID register is set to 0xB105F00D. Figure 3-2 shows the bit assignment for the SCIPCellID0-3 registers.

Actual register bit assignment

Conceptual register bit assignment

Figure 3-2 PrimeCell identification register bit assignment

The four, 8-bit PrimeCell identification registers are described in the following subsections:

•PrimeCell identification register 0, SCIPCellID0 on page 3-38

•PrimeCell identification register 1, SCIPCellID1 on page 3-39

•PrimeCell identification register 2, SCIPCellID2 on page 3-39

•PrimeCell identification register 3, SCIPCellID3 on page 3-39.

PrimeCell identification register 0, SCIPCellID0

SCIPCellID0 is hard-coded and the fields within the register determine the reset value. Table 3-42 shows the bit assignment of the SCIPCellID0 register.

Programmer’s Model

PrimeCell identification register 1, SCIPCellID1

SCIPCellID1 is hard-coded and the fields within the register determine the reset value. Table 3-43 shows the bit assignment of the SCIPCellID1 register.

PrimeCell identification register 2, SCIPCellID2

SCIPCellID2 is hard-coded and the fields within the register determine the reset value. Table 3-44 shows the bit assignment of the SCIPCellID2 register.

PrimeCell identification register 3, SCIPCellID3

SCIPCellID3 is hard-coded and the fields within the register determine the reset value. Table 3-45 shows the bit assignment of the SCIPCellID3 register.