Functional Overview
CRC token status
The CRC token status follows each write data block, and determines whether a card has received the data block correctly. When the token has been received, the card asserts a busy signal by driving MMCIDAT LOW. Table 2-5 shows the CRC token status values.
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Table 2-5 CRC token status |
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Token |
Description |
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010 |
Card has received error-free data block |
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101 |
Card has detected a CRC error |
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Status flags
Table 2-6 lists the data path status flags (see Status register, MMCIStatus on page 3-13 for more information).
Table 2-6 Data path status flags
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Flag |
Description |
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TxFifoFull |
Transmit FIFO is full |
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TxFifoEmpty |
Transmit FIFO is empty |
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TxFifoHalfEmpty |
Transmit FIFO is half full |
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TxDataAvlbl |
Transmit FIFO data available |
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TxUnderrun |
Transmit FIFO underrun error |
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RxFifoFull |
Receive FIFO is full |
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RxFifoEmpty |
Receive FIFO is empty |
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RxFifoHalfFull |
Receive FIFO is half full |
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RxDataAvlbl |
Receive FIFO data available |
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RxOverrun |
Receive FIFO overrun error |
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DataBlockEnd |
Data block sent/received |
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DataCrcFail |
Data packet CRC failed |
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DataEnd |
Data end (data counter is zero) |
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DataTimeOut |
Data timeout |
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TxActive |
Data transmission in progress |
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RxActive |
Data reception in progress |
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ARM DDI 0205B |
Copyright © 2000, 2001 ARM Limited. All rights reserved. |
2-15 |