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Файл:ARM PrimeCell SDRAM controller technical reference manual.pdf
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- •Preface
- •About this document
- •Intended audience
- •Organization
- •Typographical conventions
- •Timing diagram conventions
- •Further reading
- •ARM publications
- •Feedback
- •Feedback on this document
- •Feedback on the ARM PrimeCell SDRAM Controller
- •Introduction
- •1.1 About the ARM PrimeCell SDRAM Controller (PL170)
- •1.1.1 General information
- •1.1.2 Features of the PrimeCell SDRAM Controller
- •Functional Overview
- •2.1 ARM PrimeCell SDRAM Controller (PL170) overview
- •2.1.1 PrimeCell SDRAM control engine
- •Arbitration
- •2.1.2 Main AHB interface
- •Control registers
- •2.1.3 Optional features
- •Merging write buffer
- •Read buffer
- •2.1.4 Additional AHB ports
- •2.1.5 Pad interface
- •2.2 Overview of a Primecell SDRAM, ASIC/ASSP, unified memory system
- •2.2.1 External bus
- •2.2.2 Internal bus
- •Multi-port access
- •Clock domains
- •Maintaining memory during low-power sleep modes
- •2.2.4 Example signal waveforms
- •Programmer’s Model
- •3.1 About the programmer’s model
- •3.2 Summary of PrimeCell SDRAM Controller registers
- •3.3 Register descriptions
- •3.3.1 Configuration registers
- •Configuration register 0
- •Configuration register 1
- •3.3.2 Refresh timer register
- •3.4 System initialization
- •3.5 Address mapping
- •3.5.1 Remapping the AMBA address to the SDRAM address bus
- •A.1 On-chip signals
- •A.1.1 AMBA AHB signals
- •A.1.2 Miscellaneous
- •A.2 Off-chip signals
- •A.2.1 SDRAM memory interface signals
- •First group
- •Second group
- •Third group
- •B.1 Commands
Further reading
This section lists publications by ARM Limited, and by third parties.
ARM periodically provides updates and corrections to its documentation. See http://www.arm.com for current errata sheets and addenda.
See also the ARM Frequently Asked Questions list at:
http://www.arm.com/DevSupp/Sales+Support/faq.html
ARM publications
AMBA Specification (Rev 2.0) (ARM IHI 00011).
ARM PrimeCell SDRAM (PL170) Integration Manual
(PL170 INTM 0000).
ARM PrimeCell SDRAM (PL170) Design Manual
(PL170 DDES 0000).
ARM PrimeCell EBI (PL170) Application Note
(SC026 TRM 0000).
ARM DDI 0159D |
Copyright © ARM Limited 1999-2001. All rights reserved. |
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