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(ARM).Reference peripherals specification.pdf
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Timer

4.4Timer Memory Map

The base address of the Timers is not fixed and may be different for any particular system implementation. However, the offset of any particular register from the base address is fixed.

Address

Read Location

Write Location

 

 

 

TimerBase

Timer1Load

Timer1Load

 

 

 

TimerBase + 0x04

Timer1Value

Reserved

 

 

 

TimerBase + 0x08

Timer1Control

Timer1Control

 

 

 

TimerBase + 0x0C

Reserved

Timer1Clear

 

 

 

TimerBase + 0x10

Reserved

Reserved

 

 

 

TimerBase + 0x20

Timer2Load

Timer2Load

 

 

 

TimerBase + 0x24

Timer2Value

Reserved

 

 

 

TimerBase + 0x28

Timer2Control

Timer2Control

 

 

 

TimerBase + 0x2C

Reserved

Timer2Clear

 

 

 

TimerBase + 0x30

Reserved

Reserved

 

 

 

Table 4-2: Timer Address Map

 

 

Reference Peripherals Specification

4-7

 

 

ARM DDI 0062D

 

 

 

 

 

Open Access

Timer

4-8

Reference Peripherals Specification

 

 

 

ARM DDI 0062D

 

 

 

 

 

 

Open Access

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

Communications Channel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.1

Introduction

5-2

 

 

Reference Peripherals Specification

5-1

 

 

ARM DDI 0062D

 

 

 

 

 

Open Access