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09.RF power amplifiers

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188 RF POWER AMPLIFIERS

The */4 transmission line in effect converts the shunt load to a series load:

 

 

Z2

 

 

 

 

 

 

Z2

 

Z0

 

0

 

 

sC Z2

 

0

9.69

D

RL

C

C sL1

L

 

1

 

0

 

in which

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Z2

 

 

 

 

 

 

R0

D

0

 

 

 

 

 

 

 

RL

 

 

 

 

 

 

L

 

 

 

 

 

 

L0 D C1Z02

 

 

 

 

 

 

 

 

 

Z2

 

 

 

 

 

 

C0

 

 

0

 

 

 

 

 

 

D sL1

 

 

 

 

 

 

 

 

 

 

 

 

At the second harmonic, the transmission line is */2 and the resonator L, C

is a short, so Z0

2ω0

D

0. The effective load for all the harmonics can easily

L

 

 

 

 

 

 

 

found at each of the harmonics:

 

 

 

 

 

 

 

Z0

2ω

D

0,

 

*/2

 

 

 

L

0

 

 

 

 

 

 

Z0

3ω

D 1

,

3*/4

 

 

 

L

0

 

 

 

 

 

Z0

4ω

D

0,

 

*

 

 

 

L

0

 

 

 

 

 

 

Z0

5ω

D 1

,

5*/4

 

 

 

L

0

 

 

...

While this provides open and short circuits to the collector, it is not obvious that these impedances, which act in parallel with the output impedance of the transistor, will provide the necessary amplitude and phase that would produce a square wave at the collector.

An example of a class F amplifier design using the idealistic default SPICE bipolar transistor model illustrates what these waveforms might look like. As in the class C amplifier example, assume that the center frequency is 900 MHz, that the bandwidth is 18 MHz, and consequently that the circuit Q D 50. Furthermore, as in the class C amplifier example, assume that the collector looks into a load resistance of RL0 D 9.441 - and that Z0 D 20 - is chosen. For the series resonant effective load, the load at the end of the transmission line can be found:

Z2

RL0 D R0 D 42.37 -

L

Q D 50 D ω0L0

RL0

or

L0 D 374.6 nH

 

 

 

 

 

 

THE CLASS F POWER AMPLIFIER 189

and

 

 

 

 

 

 

C0

1

 

 

D 83.47 fF

D

 

 

 

ω2L

0

 

0

 

 

 

L D Z02C0

D 33.39 pH

C D

L0

D 0.9366 nH

Z02

 

Even with all the assumptions regarding the transistor and lossless, dispersionless elements, the results are still not pretty. The transistor is biased to provide 0.8 volts at the base (Fig. 9.16). When the ac input voltage amplitude at the base of the transistor is 0.11 volts, the resulting collector current is shown in Fig. 9.17. This is hardly a half sine wave as one might expect from an over simplified analysis. The graph in Fig. 9.18 shows at least the rudiments of a square wave on the collector. The places where the voltage exceeds 2VCC is a result of constructive interference of various traveling waves. Nevertheless, an average output power on the load, RL, of approximately 5.5 W is achieved as seen from the instantaneous output power in Fig. 9.19. The power-added efficiency for this circuit is found from the SPICE analysis. The dc input power is 5.656 W, and the ac input power is 2.363 mW. The power-added efficiency is then

 

D

Pout Pin ac

9.70

Pdc

 

 

 

D 97.4%

 

Collector Current, A

4.00

 

 

 

 

 

 

 

 

3.50

 

 

 

 

 

 

 

 

3.00

 

 

 

 

 

 

 

 

2.50

 

 

 

 

 

 

 

 

2.00

 

 

 

 

 

 

 

 

1.50

 

 

 

 

 

 

 

 

1.00

 

 

 

 

 

 

 

 

0.50

 

 

 

 

 

 

 

 

0.00

 

 

 

 

 

 

 

 

– 0.50

 

 

 

 

 

 

 

 

– 1.00

70.5

71.0

71.5

72.0

72.5

73.0

73.5

74.0

70.0

Time, ns

FIGURE 9.17 Class F collector current when the ac VG D 0.11 volts.

190

Collector Voltage

RF POWER AMPLIFIERS

50.00

 

 

 

 

 

 

 

 

40.00

 

 

 

 

 

 

 

 

30.00

 

 

 

 

 

 

 

 

20.00

 

 

 

 

 

 

 

 

10.00

 

 

 

 

 

 

 

 

0.00

 

 

 

 

 

 

 

 

–10.00

 

 

 

 

 

 

 

 

– 20.00

 

 

 

 

 

 

 

 

– 30.00

70.5

71.0

71.5

72.0

72.5

73.0

73.5

74.0

70.0

Time, ns

FIGURE 9.18 Class F collector voltage when the ac VG D 0.11 volts.

Power, W

12.00

 

 

 

 

 

 

 

 

11.00

 

 

 

 

 

 

 

 

10.00

 

 

 

 

 

 

 

 

9.00

 

 

 

 

 

 

 

 

8.00

 

 

 

 

 

 

 

 

7.00

 

 

 

 

 

 

 

 

6.00

 

 

 

 

 

 

 

 

5.00

 

 

 

 

 

 

 

 

4.00

 

 

 

 

 

 

 

 

3.00

 

 

 

 

 

 

 

 

2.00

 

 

 

 

 

 

 

 

1.00

 

 

 

 

 

 

 

 

0.00

70.5

71.0

71.5

72.0

72.5

73.0

73.5

74.0

70.0

Time, ns

FIGURE 9.19 Class F collector load power when the ac VG D 0.11 volts.

11.00

10.75

10.50

10.25

10.00

W

9.75

 

 

 

 

Power,

9.50

 

 

 

 

 

 

9.25

 

 

 

 

 

 

9.00

 

 

 

 

 

 

8.75

 

 

 

 

 

 

8.50

 

 

 

 

 

 

8.25

 

 

 

 

 

 

8.00

 

 

 

70.0

FEED-FORWARD AMPLIFIERS

191

VG = 0.11

0.09

0.15

70.5

71.0

71.5

72.0

72.5

73.0

73.5

74.0

Time, ns

FIGURE 9.20 Class F collector load power as a function of VG.

The bad news is that the output power is very sensitive to the amplitude of the ac input voltage, VG, as demonstrated in Fig. 9.20. A more extensive harmonic balance analysis of a physics based model for a metal semiconductor field effect transistor (MESFET) showed that a power added efficiency of 75% can be achieved at 5 GHz [6].

9.7FEED-FORWARD AMPLIFIERS

The concept of feed-forward error control was conceived in a patent disclosure by Harold S. Black in 1924 [7]. This was several years prior to his more famous concept of feedback error control. An historical perspective on the feed-forward idea is found in [8]. The feedback approach is an attempt to correct an error after it has occurred. A 180° phase difference in the forward and reverse paths in a feedback system can cause unwanted oscillations. In contrast, the feed-forward design is based on cancellation of amplifier errors in the same time frame in which they occur. Signals are handled by wideband analog circuits, so multiple carriers in a signal can be controlled simultaneously. Feed-forward amplifiers are inherently stable, but this comes at the price of a somewhat more complicated circuit. Consequently feed-forward circuitry is sensitive to changes in ambient temperature, input power level, and supply voltage variation. Nevertheless, feedforward offers many advantages that have brought it increased interest.

The major source of distortion, such as harmonics, intermodulation distortion, and noise, in a transmitter is the power amplifier. This distortion can be greatly

192

RF POWER AMPLIFIERS

 

 

 

 

coup1

Main Amp

coup2

delay2

coup4

C 1 dB

G 1 dB

C 2 dB

D 2 dB

C 4 dB

 

 

 

L 1

dB

 

 

delay1

C 3 dB

Error Amp

 

 

 

 

 

D 1

dB

coup3

G 2

dB

 

 

 

 

FIGURE 9.21 Linear feed-forward amplifier.

reduced using feed-forward design. The basic idea is illustrated in Fig. 9.21, where it is seen that the circuit consists basically of two loops. The first one contains the main power amplifier, and the second loop contains the error amplifier. In the first loop, a sample of the input signal is coupled through “coup1” reducing the signal by the coupling factor C1 dB. This goes through the delay line with insertion loss of D1 dB into the comparator coupler “coup3.” At the same time the signal passing through the main amplifier with gain G1 dB is sampled by coupler “coup2” reducing the signal by C2 dB, the attenuator by L1 dB, and the coupler “coup3” by C3 dB. The delay line is adjusted to compensate for the time delay in the main amplifier as well as the passive components so that two input signals for “coup3” are 180° out of phase but synchronized in time. The amplitude of the input signal when it arrives at the error amplifier is

C1 D1 [G1 C2 L1 C3]

9.71

which should be adjusted to be zero. What remains is the distortion and noise added by the main amplifier which is in turn amplified by the error amplifier by G2 dB. At the same time the signal from the main amplifier with its distortion and noise is attenuated by D2 dB in the second loop delay line. The second delay line is adjusted to compensate for the time delay in the error amplifier. The relative phase and amplitude of the input signals to “coup4” are adjusted so that the distortion terms cancel. The output distortion amplitude

D2 [ C2 L1 C3 C G2 C4]

9.72

should be zero for complete cancellation to occur.

The error amplifier will also add distortion and noise to its input signal so that perfect error correction will not occur. Nevertheless, a dramatic improvement is possible, since the error amplifier will be operating on a smaller signal (only distortion) that will likely lie in the linear range of the amplifier. Further improvement may be accomplished by treating the entire amplifier in Fig. 9.21 as the main amplifier and adding another error amplifier with its associated circuitry [8].

REFERENCES 193

A typical implementation of a feed-forward system is described in [9] for an amplifier operating in the frequency range of 2.1 to 2.3 GHz with an RF gain of 30 dB, and an output power of 1.25 W. This amplifier had intermodulation products at least 50 dB below the carrier level. Their design used a 6 dB coupler for “coup1,” a 13 dB coupler for “coup2,” a 10 dB coupler for “coup3,” and an 8 dB coupler for “coup4.” In some designs the comparator coupler, “coup3,” is replaced by a power combiner.

The directional coupler itself can be implemented using microstrip or stripline coupled lines at higher frequencies [10] or by a transmission line transformer. A variety of feed forward designs have been implemented, some using digital techniques [11,12].

PROBLEMS

9.1If the crossover discontinuity is neglected, is a class B amplifier considered a linear amplifier or a nonlinear amplifier? Explain your answer.

9.2A class B amplifier such as that shown in Fig. 9.7 is biased with an 18 volt power supply, but the maximum voltage amplitude across each transistor is 16 volts. The remaining 2 volts is dissipated as loss in the output transformer. If the amplifier is designed to deliver 12 W of RF power, find the following:

(a)The maximum RF collector current

(b)The total dc current from the power supply

(c)The collector efficiency of this amplifier.

9.3The class C amplifier shown in Fig. 9.9 has a conduction angle of 60°. It is designed to deliver 75 W of RF output power. The saturated collector–emitter voltage is known to be 1 volt, and the power supply voltage is 26 volts. What is the maximum peak collector current.

REFERENCES

1.P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, New York: Wiley, 1993.

2.H. L. Krauss, C. W. Bostian, and F. H. Raab, Solid State Radio Engineering, New York: Wiley, 1980.

3.D. M. Snider, “A Theoretical Analysis and Experimental Confirmation of the Optimally Loaded and Overdriven RF Power Amplifier,” IEEE Trans. on Electron Devices, Vol. ED-14, pp. 851–857, 1967.

4.F. H. Raab, “Class-F Power Amplifiers with Maximally Flat Waveforms,” IEEE Trans. Microwave Theory Tech., Vol. 45, pp. 2007–2012, 1997.

5.C. Trask, “Class-F Amplifier Loading Networks: A Unified Design Approach,” 1999 IEEE MTT-S International Symp. Digest, Piscataway, NJ: IEEE Press, 1999, pp. 351– 354.

194 RF POWER AMPLIFIERS

6.L. C. Hall and R. J. Trew, “Maximum Efficiency Tuning of Microwave Amplifiers,” 1991 MTT-S International Symp. Digest, Piscataway, NJ: IEEE Press, 1991, pp. 123– 126.

7.H. S. Black, U.S. Patent 1,686,792, issued October 9, 1929.

8.H. Seidel, H. R. Beurrier, and A. N. Friedman, “Error-Controlled High Power Linear Amplifiers at VHF,” Bell Sys. Tech. J., Vol. 47, pp. 651–722, 1968.

9.C. Hsieh and S. Chan, “A Feedforward S-Band MIC Amplifier System,” IEEE J. Solid State Circuits, Vol. SC-11, pp. 271–278, 1976.

10.W. A. Davis Microwave Semiconductor Circuit Design, 1984, Ch. 4.

11.S. J. Grant, J. K. Cavers, and P. A. Goud, “A DSP Controlled Adaptive Feed Forward Amplifier Linearizer,” Annual International Conference on Universal Personal Communications, pp. 788–792, September 29–October 2, 1996.

12.G. Zhao, F. M. Channouchi, F. Beauregard, and A. B. Kouki, “Digital Implementations of Adaptive Feedforward Amplifier Linearization Techniques,” IEEE Microwave Theory Tech. Symp. Digest, June 1996.

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