Microcontrollers in Practice (Mitescu M., 2005)

122 9 HC11 Development Board

Here is the list file generated by ASHC11 for this fragment:

For the variable VAR1, one byte is reserved, at the current address in the DATA section. The variable BUF1 takes the next 10 bytes between the addresses $101 and $10A, and VAR2 will take the memory location at the address $010B.

A similar process occurs for the CODE section. The assembler automatically determines how many bytes of code each instruction need, and increments the pointer accordingly.

Step 3. Creating Symbolic Names for Resources

The EQU (EQUation) directive associates a numeric value to a symbolic name like in this example:

In this mode, all the resources of the microcontroller can have symbolic names assigned. These definitions can be saved in distinct files that can be invoked later, using the INCLUDE directive. The accompanying CD includes several definition files for the HC11 microcontrollers. They are named 68HC11E9.DEF, 68HC11F1.DEF, 68HC11KA.DEF.

STEP 4. USING MACROS

A MACRO is a block of code delimited by the directives MACRO and ENDM, associated with the label NAME:

When the assembler encounters a previously defined MACRO name in the source file, it automatically inserts the whole block of code associated with that MACRO name. The examples below are intended to illustrate the utility of this feature:

The next MACROs create the possibility of conditional program jumps anywhere in the 64 K addressable space.

Please note the following distinctive features of these MACROs:

1.MACROs allow the use of parameters, in this case the destination address of the jump.

2.Local labels are allowed. This avoids “duplicate symbol” errors, when the macro is used more than once in a software module. Note that not all assemblers allow local labels in MACROs.

3.The line @A EQU *

indicates that the symbolic label @A receives the current value of the pointer of the CODE section.

An interesting application of this feature is shown in the following example:

VECTOR_SCI MACRO

LOCAL @SCI_SVC CODE

@SCI_SVC SET * ORG $FFD6

DW @SCI_SVC

ORG @SCI_SVC ENDM

This MACRO saves the current address in the CODE section in the variable @SCI_SVC, then stores this value to the addresses $FFD6-$FFD7, which contain the interrupt vector for the SCI system. After this operation the pointer of the section is restored to the value saved in the variable @SCI_SVC. Similar MACROs define the other interrupt vectors. See the file AS11.MAC on the accompanying CD, for the whole set of MACROs used in this book.

Step 5. Defining a General Structure for Software Applications

Consider the example found in the file STEP5.ASM:

*............................

*other user modules come here

INCLUDE GENLIB.ASM

;general purpose ;routines

INCLUDE TABLES.ASM ;ROM tables END

The first line instructs the assembler to include in the source file the file 68HC11F1.DEF, which contains symbolic definitions for the resources of the microcontroller.

The second line invokes the library of MACRO definitions AS11.MAC.

The file MAP.ASM, invoked in the third line, contains the origins of the DATA and CODE sections. It is advisable to define here all the variables used by the program. Here is an example of structure for MAP.ASM.

Note that no actual executable code has been generated so far. The purpose of all these include files is to simplify and to organize the dialog with the assembler.

The MACRO named VECTOR_RESET defines the entry point in the main program after RESET. The first piece of code executed after RESET is the initialization

sequence for registers associated with the hardware subsystems and for RAM variables.

The example below presents some typical initializations: the stack pointer, data direction register for an I/O port, and some variables:

*.......

END

An important detail on this initialization sequence concerns the ability of 68HC11F1 to generate four selection signals, CSPROG, CSGEN, CSIO1, CSIO2, for external memory or I/O devices

These signals are software controlled by means of four special registers: CSCTL, CSGADR, CSGSIZ and CSSTRH.

The CSPROG line that selects the external program memory is controlled by the CSCTL register. The structure of CSCTL register is as follows:

•IO1EN – Enable CSIO1.

When set to 1, CSIO1 is enabled. When cleared to 0, CSIO1 is disabled and the associated pin, PORTG bit 5, is usable as a general-purpose I/O pin.

•IO1PL – Controls the polarity of CSIO1. When this bit is 0, CSIO1 is active LOW; when set to 1, CSIO1 is active HIGH.

IO2EN and IO2PL act similarly on CSIO2.

•GCSPR – General-Purpose Chip Select Priority

GCSPR =0 CSPROG has priority compared to CSGEN GCSPR = 1 CSGEN has priority compared to CSPROG

•PCSEN – Program Chip Select Enable

When the microcontroller operates in expanded mode (i.e. with external bus) this bit is automatically set out of RESET.

PSIZA and PSIZB. These bits relate the selection signal with the size of the external memory, as shown in Table 9.1.

This explains why, in the initialization sequence, CSCTL is written with $05. This means that an external 32 K ROM is used, while the other three chip selects are disabled and the pins of PORTG are usable as general-purpose I/O pins.

126 9 HC11 Development Board

Table 9.1. The effect of programming the bits [PSIZA:PSIZB] in CSCTL

After the initialization sequence, the program enters an infinite loop. In the example presented (STEP5.ASM) the program loop includes the modules TIMER.ASM and SCI.ASM, while GENLIB.ASM and TABLES.ASM remain outside the loop. See the examples in the next paragraph for a better understanding on how to organize your software.

Step 6. Creating Reusable Software Modules

This paragraph presents a detailed solution to create a set of software timers. A software timer is basically a predefined variable that can be initialized by the program. Once initialized these predefined “timers” are automatically decremented at precise time intervals. Thus, the timer will reach zero after a time T = N × Kt , where N is the initialization value and Kt is the time quantum between two successive decrements. The time quantum is generated using the TOC2 (Timer Output Compare 2) interrupt, which is generated every 4 milliseconds. Based on this interrupt, precise 100 ms, 1-second, and 1-minute intervals are generated.

When a time quantum expires, the associated set of variables (software timers) is scanned, and if their value is greater than zero, they are decremented.

The software timers are defined in MAP.ASM, which becomes:

TITLE Memory map & global variables

CODE

ORG ROMBASE

END

The TOC2 initialization routine, the interrupt service routine, and the code that scans and decrements the software timers are placed in TIMER.ASM.

To improve the readability of the program, a MACRO, called DJEQ (Decrement or Jump if EQual to zero), has been defined. It has the following structure:

DJEQ receives a parameter, which is the symbolic address of the destination. It checks the content of the destination, and if greater than zero, it decrements it by one. If the destination is zero, DJEQ returns leaving the destination unchanged.

Here is the full listing of TIMER.ASM:

TITLE MAIN TIMER

CODE

JMP TMRMAIN

9.5 Exercises

SX 9.1

Using the software timers described in this paragraph, write a program that toggles PORTA bit 7 every 1 second, and PORTA bit 6 every 2.5 seconds.

Solution

Out of RESET, all I/O lines are configured as inputs. Therefore, we must configure the selected bits of PORTA as outputs, by adding the following lines to INIT.ASM.

130 9 HC11 Development Board

The main program looks like this:

The program uses two timers with the quantum 100 milliseconds, T100MS0 and T100MS1, which are tested one by one in an endless loop. When a timer reaches zero, the associated I/O line is toggled, and the timer is reloaded with the desired value.

X 9.2

Write a program that reads all the analog inputs every 20 milliseconds, and updates a set of variables AN0–AN7.

X 9.3

Write a program that uses the SCI reception interrupt. Upon reception of an ASCII code for ‘A’ ($41) the program answers with the last value read from the analog input AN0. The byte is transmitted as two ASCII characters, corresponding to its hexadecimal representation.

X 9.4

Modify the schematics of the module described in this chapter, by adding an external 32 K RAM circuit, selected by CSGEN. Describe the initialization sequence in this case.

10

AVR Development Board

10.1 In this Chapter

This chapter describes a simple, yet flexible development board, based on AT90S8535, for the study of the AVR microcontrollers. This board can be used to test most of the AVR projects presented in this book.

10.2 The Hardware

The schematic of the development board is shown in Fig. 10.1. The circuit comprises the following functional blocks:

1.Microcontroller

2.Clock circuit

3.RESET circuit

4.Output buffers

5.ISP interface

6.RS232 interface

7.Power supply circuit.

The microcontroller is an AT90S8535-P in a DIP40 package. Note that this microcontroller is pin by pin, hardware compatible with other members of the analog series of AVR microcontrollers, like ATMega8535 and ATMega16. However, there are many differences between these microcontrollers. Consult the data sheets before making the replacement.

The external clock circuit uses an 8 MHz crystal, Q1, and the capacitors C10, C11 (12–47 pF). The RESET circuit consists of the resistor R1 (10 K), and the capacitor C1 (10 F/10 V). These values are not critical, because AT90S8535 contains internal signal conditioning circuits for the RESET signal.

The digital input lines are connected to PORTC, and are pulled up to Vcc with resistors. A group of LEDs has been included, to show the status of each input.